Technical Field
The present invention generally relates to semiconductor devices and, more particularly, to strained channel field effect transistors.
Description of the Related Art
As semiconductor fabrication processes produce increasingly small features, nanowires and nanosheets are being used to further the scaling of complementary metal-oxide semiconductor (CMOS) devices, and field effect transistors (FETs) in particular.
Strain engineering is used in CMOS fabrication to boost device performance. Putting a compressive on a p-type CMOS transistor or a tensile strain on an n-type CMOS transistor can enhance electron (or hole) mobility in the transistor's channel and thereby improve conductivity of the device. Various techniques may be used to induce strain in a semiconductor structure.
However, when, for example, a strained semiconductor fin is cut to length, the induced strain can relax at the fin ends. The loss of strain at fin ends can cause device degradation and variation.